By way of example, one significant phase of integrated circuit fabrication involves the process of transferring a mask pattern to a wafer with subsequent etching to remove unwanted material, for instance, to facilitate forming fin structures and/or gate structures of fin-type field-effect transistors (FINFETs), or field-effect transistors (FETs) in general. This process is typically referred to as photolithography, or simply lithographic processing. Lithography and other similar fabrication processes (e.g., etch processes) can be optimized by varying numerous process parameters based on in-line or off-line inspection results. Conventional parameter optimization processes can be time consuming and add significant cost to the integrated circuit fabrication process.